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| RH118 Precision, High Speed Operational Amplifier U WW TOP VIEW 8 7 6 5 J8 PACKAGE 8-LEAD CERDIP COMP2 V+ OUT COMP3 DESCRIPTION The RH118 is a precision, high speed operational amplifier which offers wide bandwidth and high slew rate. Unlike many wideband amplifiers, the RH118 is unity-gain stable and has a slew rate of 50V/s. The wafer lots are processed to Linear Technology's inhouse Class S flow to yield circuits usable in stringent military applications. , LTC and LT are registered trademarks of Linear Technology Corporation. ABSOLUTE MAXIMUM RATINGS Supply Voltage ...................................................... 20V Differential Input Current (Note 1) ...................... 10mA Input Voltage (Note 2) .......................................... 20V Output Short-Circuit Duration ......................... Indefinite Operating Temperature Range .............. - 55C to 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C BUR -I CIRCUIT (Each Amplifier) 10k 20V 2 200 3 10k -20V -20V RH118 BI 20V - + 7 6 OR 249k 3V 2 - + 7 6 3 4 4 PACKAGE/ORDER INFORMATION TOP VIEW COMP2 8 COMP1 1 -IN 2 +IN 3 4 V - (CASE) H PACKAGE 8-LEAD TO-5 METAL CAN - TOP VIEW 7 V+ 6 OUT COMP1 1 -IN 2 +IN 3 NC COMP1 -INPUT +INPUT V- 5 COMP3 V- 4 W U W U U UU + 301 1 2 3 4 5 10 9 8 7 6 NC COMP3 V+ OUTPUT COMP2 W PACKAGE 10-LEAD CERPAC 1 RH118 TABLE 1: ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS IOS IB RIN AV SR GBW Input Offset Voltage Input Offset Current Input Bias Current Input Resistance Large-Signal Voltage Gain VS = 15V, VOUT = 10V RL 2k Slew Rate Gain Bandwidth Product Output Voltage Swing Input Voltage Range IS Supply Current TA = 125C CMRR PSRR Common Mode Rejection Ratio Power Supply Rejection Ratio 80 70 1 1 80 70 VS = 15V, AV = 1 VS = 15V VS = 15V, RL = 2k VS = 20V 12 16.5 8 5 4 1 50 50 15 4 1 1 7 2 2,3 2,3 12 16.5 5,6 2,3 1 25 2,3 CONDITIONS NOTES (Preirradiation) (Note 3) TA = 25C TYP MAX 4 50 250 SUB- - 55C T A 125C GROUP MIN TYP MAX 1 1 1 6 100 500 SUBGROUP 2,3 2,3 2,3 MIN UNITS mV nA nA M V/mV V/s MHz V V mA mA dB dB TABLE 1A: ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS IOS IB RIN AV SR GBW Input Offset Voltage Input Offset Current Input Bias Current Input Resistance Large-Signal Voltage Gain VS = 15V, VOUT = 10V RL 2k Slew Rate Gain Bandwidth Product Output Voltage Swing Input Voltage Range IS CMRR PSRR Supply Current Common Mode Rejection Ratio Power Supply Rejection Ratio 80 70 VS = 15V, AV = 1 VS = 15V VS = 15V, RL = 2k 12 16.5 5 4 1 50 50 CONDITIONS (Postirradiation) (Note 6) 50Krad(Si) 100Krad(Si) 200Krad(Si) MIN MAX MIN MAX MIN MAX UNITS 4 50 250 1 50 50 15(Typ) 12 16.5 8 80 70 8 80 70 15(Typ) 12 16.5 8 80 70 0.5 50 50 15(Typ) 12 15 8 70 60 12 12 8 4 50 300 0.5 25 50 15(Typ) 10 100 400 mV nA nA M V/mV V/s MHz V V mA dB dB 10Krad(Si) 20Krad(Si) NOTES MIN MAX MIN MAX 4 50 250 1 50 50 15(Typ) 4 50 250 2 RH118 ELECTRICAL CHARACTERISTICS (Continued) Note 4: Guaranteed by design, characterization or correlation to other tested parameters. Note 5: Slew rate is 100% tested at wafer probe testing. It is QA sample tested in finished package form. Note 6: TA = 25C, VS = 20V, VCM = 0V, unless otherwise specified. Supply bypassed per Note 3. Note 1: The inputs are shunted with back-to-back Zeners for overvoltage protection. Excessive current will flow if a differential voltage greater than 5V is applied to the inputs. Note 2: For supply voltages less than 15V, the maximum input voltage is equal to the supply voltage. Note 3: These specifications apply for 5V V S 20V. The power supplies must be bypassed with a 0.1F or greater disc capacitor within four inches of the device. TOTAL DOSE BIAS CIRCUIT 10k 15V 2 7 6 10k 8V 3 - + 4 0.1F -15V 0.1F RH118 TDBC TABLE 2: ELECTRICAL TEST REQUIRE E TS MIL-STD-883 TEST REQUIREMENTS Final Electrical Test Requirements (Method 5004) Group A Test Requirements (Method 5005) Group C and D End Point Electrical Parameters (Method 5005) * PDA Applies to subgroup 1. See PDA Test Notes. SUBGROUP 1*,2,3,4,5,6 1,2,3,4,5,6 1 PDA Test Notes The PDA is specified as 5% based on failures from group A, subgroup 1, tests after cooldown as the final electrical test in accordance with method 5004 of MIL-STD-883 Class B. The verified failures (including Delta parameters) of group A, subgroup 1, after burn-in divided by the total number of devices submitted for burn-in in that lot shall be used to determine the percent for the lot. Linear Technology Corporation reserves the right to test to tighter limits than those given. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. UW 3 RH118 TYPICAL PERFORMANCE CHARACTERISTICS Input Offset Voltage 6 4 2 0 -2 -4 -6 V S = 20V VCM = 0V INPUT BIAS CURRENT (nA) INPUT OFFSET VOLTAGE (mV) 400 300 200 100 0 INPUT OFFSET CURRENT (nA) 1 10 100 TOTAL DOSE Krad (Si) Open-Loop Gain 400 110 COMMON MODE REJECTION RATIO (dB) 100 90 80 70 60 50 40 POWER SUPPLY REJECTION RATIO (dB) V S = 15V VO = 10V RL = 2k OPEN-LOOP GAIN (V/mV) 300 200 100 0 1 10 100 TOTAL DOSE Krad (Si) 4 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977 UW RH118 G01 RH118 G02 Input Bias Current 600 500 V S = 20V VCM = 0V 60 40 20 0 -20 -40 -60 Input Offset Current V S = 20V VCM = 0V 1000 1 10 100 TOTAL DOSE Krad (Si) 1000 RH118 G03 1 10 100 TOTAL DOSE Krad (Si) 1000 RH118 G05 Common Mode Rejection Ratio V S = 20V VCM = 16.5V 110 100 90 80 70 60 50 Power Supply Rejection Ratio V S = 5V TO 20V 40 1 10 100 TOTAL DOSE Krad (Si) 1000 RH118 G06 1000 1 10 100 TOTAL DOSE Krad (Si) 1000 RH118 G04 I.D. No. 66-11-0118 Rev. A 0796 LT/HP 0796 REV A 500 * PRINTED IN USA (c) LINEAR TECHNOLOGY CORPORATION 1989 |
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